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通信工程有关英语论文

2017-05-28  必发娱乐  本文已影响   字号:T|T

篇一:通信工程有关英语论文

GeneralSituation low-power,high-performance CMOS 8-bit microcomputer 4Kbytes FlashProgrammable ErasableRead Only Memory (PEROM) 128bytes RAM. manufacturedusing Atmel’s high density nonvolatile memory technology industrystandard MCS-51 instruction set pinout. chipcombines versatile8-bit CPU monolithicchip; AtmelAT89C51 powerfulmicrocomputer which provides highlyflexible costeffective solution manyembedded control applications. MCS-51Products 4KBytes In-SystemReprogrammable Flash Memory Endurance:1,000 Write/Erase Cycles FullyStatic Operation: 24MHz Three-LevelProgram Memory Lock 8-BitInternal RAM 32Programmable Two16-Bit Timer/Counters SixInterrupt Sources ProgrammableSerial Channel LowPower Idle PowerDown Modes AT89C51provides followingstandard features: 4K bytes Flash,128 bytes RAM,32 lines,two 16-bit timer/counters, fivevector two-level interrupt architecture, fullduplex serial port, on-chip oscillator clockcircuitry. staticlogic operationdown zerofrequency supportstwo software selectable power saving modes. IdleMode stops CPUwhile allowing RAM,timer/counters, serial port interruptsystem continuefunctioning. PowerDown Mode saves RAMcontents oscillatordisabling all other chip functions until nexthardware reset. BlockDiagram PinDescription: VCCSupply voltage. GNDGround. Port0:Port 8-bitopen drain bidirectional outputport each pin can sink eight TTL inputs. When 1s pinscan highimpedance inputs. (Sink/flow) mayalso multiplexedlow order address/data bus during accesses externalprogram datamemory. modeP0 has internalpull-ups. alsoreceives codebytes during Flash programming, codebytes during program verification. External pull-ups requiredduring program verification. Port1:Port 8-bitbidirectional internalpull-ups. outputbuffers can sink/source four TTL inputs. When 1s pulledhigh internalpull-ups inputs,Port externallybeing pulled low sourcecurrent (IIL) because internalpull-ups. alsoreceives low-orderaddress bytes during Flash programming Port2:Port 8-bitbidirectional internalpull-ups. outputbuffers can sink/source four TTL inputs. When 1s pulledhigh internalpull-ups inputs,Port externallybeing pulled low sourcecurrent (IIL) because internalpull-ups. high-orderaddress byte during fetches from external program memory duringaccesses externaldata memory uses16-bit addresses (MOVX usesstrong internal pull-ups when emitting 1s. During accesses externaldata memories use8-bit addresses (MOVX RI),Port P2Special Function Register. alsoreceives high-orderaddress bits somecontrol signals during Flash programming Port3:Port 8-bitbidirectional internalpull-ups. outputbuffers can sink/source four TTL inputs. When 1s pulledhigh internalpull-ups inputs,Port externallybeing pulled low sourcecurrent (IIL) because alsoserves variousspecial features listedbelow: alsoreceives some control signals Flashprogramming RST:Resetinput. twomachine cycles while runningresets ALE/PROG:AddressLatch Enable output pulse lowbyte addressduring accesses externalmemory. programpulse input (PROG) during Flash programming. normaloperation ALE constantrate oscillatorfrequency, externaltiming clockingpurposes. Note, however, oneALE pulse skippedduring each access externalData Memory. desired,ALE operation can settingbit SFRlocation 8EH. bitset, ALE activeonly during MOVCinstruction. Otherwise, weaklypulled high. Setting ALE-disablebit has externalexecution mode. PSEN:ProgramStore Enable readstrobe externalprogram memory. When executingcode from external program memory, PSEN activatedtwice each machine cycle, except twoPSEN activations skippedduring each access externaldata memory. EA/VPP:ExternalAccess Enable. EA must fetchcode from external program memory locations starting 0000Hup FFFFH.Note, however, lockbit 1(LB1) programmed,EA internallylatched (fasten EAshould internalprogram executions. pinalso receives 12-voltprogramming enable voltage(VPP) during Flash programming, require12-volt VPP. invertingoscillator amplifier internalclock operating circuit. XTAL2:Outputfrom invertingoscillator amplifier. OscillatorCharacteristics:XTAL1 output,respectively, invertingamplifier which can on-chiposcillator, quartzcrystal ceramicresonator may devicefrom externalclock source, XTAL2 should leftunconnected while XTAL1 dutycycle externalclock signal, since internalclocking circuitry divide-by-twoflip-flop, maximumvoltage high lowtimes specifications must IdleMode:In idle mode, CPUputs itself sleepwhile all chipperipherals remain active. on-chipRAM specialfunctions registers remain unchanged during idlemode can anyenabled interrupt hardwarereset. whenidle hardware reset, devicenormally resumes program execution, from where leftoff, up twomachine cycles before internalreset algorithm takes control. On-chip hardware inhibits access internalRAM portpins unexpectedwrite portpin when Idle instructionfollowing invokesIdle portpin externalmemory. PowerDown Mode powerdown mode invokespower down lastinstruction executed. on-chipRAM SpecialFunction Registers retain valuesuntil powerdown mode onlyexit from power down hardwarereset. Reset redefines on-chipRAM. resetshould activatedbefore VCC itsnormal operating level heldactive long enough ProgramMemory Lock Bits threelock bits which can leftunprogrammed additionalfeatures listed tablebelow: Whenlock bit logiclevel EApin latchedduring reset. poweredup without latchinitializes randomvalue, valueuntil reset latchedvalue currentlogic level functionproperly. Flash:TheAT89C51 normallyshipped on-chipFlash memory array erasedstate programminginterface accepts either high-voltage(12-volt) low-voltage(VCC) program enable signal. lowvoltage programming mode provides convenientway AT89C51inside user’ssystem, while high-voltageprogramming mode conventionalthird party Flash EPROMprogrammers. low-voltageprogramming mode enabled. respectivetop-side marking devicesignature AT89C51code memory array programmedbyte-bybyte eitherprogramming mode. programany nonblank byte on-chipFlash Programmable ErasableRead Only Memory, entirememory must erasedusing ChipErase Mode. ProgrammingAlgorithm: Before programming address,data controlsignals should setup according Flashprogramming mode table AT89C51,take followingsteps. desiredmemory location addresslines. appropriatedata byte datalines. correctcombination controlsignals. RaiseEA/VPP high-voltageprogramming mode. PulseALE/PROG once Flasharray lockbits. byte-writecycle typicallytakes morethan 1.5 ms. Repeat steps entirearray objectfile DataPolling: AT89C51features Data Polling writecycle. During writecycle, attemptedread lastbyte written writtendatum PO.7.Once writecycle has been completed,

篇二:通信工程有关英语论文

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篇三:通信工程有关英语论文

CELLULARWIRELESS COMMUNATIONSYSTEM Cellularcommunication systems allow largenumber ofmobile usersto seamlessly simultaneouslycommunicate wirelessmodemsat fixed basestations usingalimited amount radiofrequency (RF) spectrum.TheRFtransmissions received basestations from each mobile widebandmicrowave link, mobileswitchingcenters(MSC), which connect mobiletransmissions PublicSwitchedTelephoneNetwork (PSTN). Similarly, communications from basestation,where mobile.Cellular systemsemploy eitherfrequency division multiple access (FDMA), time division multipleaccess (TDMA),code division multiple access (CDMA), spatialdivision multipleaccess (SDMA). widevariety wirelesscommunication systems have been developed toprovideaccess communicationsinfrastructure fixedusers myriadofoperating environments. Most today’swireless systems thecellularradioconcept. Cellular communication systems allow largenumber ofmobile usersto seamlessly simultaneouslycommunicate wirelessmodemsat fixed basestations usingalimited amount radiofrequency (RF) spectrum.TheRFtransmissions received basestations from each mobile widebandmicrowave link, mobileswitchingcenters(MSC), which connect mobiletransmissions PublicSwitchedTelephoneNetwork (PSTN). Similarly, communications from basestation,where mobile.Cellular systemsemploy eitherfrequency division multiple access (FDMA), time division multipleaccess (TDMA),code division multiple access (CDMA), spatialdivision multipleaccess (SDMA) Wirelesscommunication links experience hostile physical channel time-varyingmultipath shadowingdue largeobjects wirelesscellular systems tendsto interferencefrom other users, importanttohave accuratetechniques modelinginterference. complexchannel conditionsare difficult simpleanalytical model, although severalmodels do provideanalytical tractability reasonableagreement measuredchanneldata However,even when analyticallyelegantmanner, thevastmajority stilldifficult impossibletoconstruct analytical solutions linkperformance when error control coding,equalization, diversity, networkmodels linkmodel. Simulationapproaches, therefore, usuallyrequired when analyzing performanceofcellular communication links. Likewireless links, systemperformance cellularradio system mosteffectivelymodeledusing simulation, due largenumberof random events over time randomevents, simultaneoususers propagationconditions,interference powerlevel settings eachuser, trafficdemandsof each user,combine together overallperformance seen thecellularsystem. aforementionedvariables smallsamplingof manykey physical mechanisms instantaneousperformanceof particularuser anytime within termcellular radio system,therefore, refers entirepopulation mobileusers basestationsthroughout geographicservicearea, singlelink connectsasingle mobile user singlebase station. particularsystem-levelperformance, particularuser having acceptable servicethroughout multipleusersthat simultaneouslyusingthe system throughout coveragearea. Thus, simulationis needed multi-usereffects upon any individuallinksbetween linkperformance asmall-scalephenomenon, which deals channelover smalllocal area, smalltime duration, averagereceived power assumedconstant assumptionsaresensible errorcontrol codes, equalizers, othercomponents thatserve transienteffects created channel.However, ordertodetermine overallsystem performance largenumber usersspread over awide geographic area, incorporatelarge-scale effects thestatisticalbehavior signallevels experienced individualusersover large distances, while ignoring transientchannel characteristics. One maythink link-levelsimulation vernieradjustment performanceofacommunication system, system-levelsimulation coarse,yetimportant, approximation overalllevel anyuser could expectat any time. Cellularsystems achieve high capacity (e.g., serve largenumber users)byallowingthe mobile stations communicationchannel geographicservice area. Channel reuse leads co-channelinterferenceamong users sharing samechannel, which themajorlimitingfactors cellularsystem. co-channelinterference capacityandperformance thereforerequired when deploying cellular systems, whenanalyzingand designing system methodologies undesiredeffects ofco-channelinterference. stronglydependent systemaspects ofthecommunication system, userssharing channelandtheirlocations. Other aspects, more related propagationchannel, aspathloss,shadow fading antennaradiation patterns systemperformance, since effectsalso vary withthe locations ofparticular users. chapter,we applicationofsystem-levelsimulation cellularcommunicationsystem under co-channelinterference. We simplemultiple-usercellularsystem, including propagationeffects atypicalsystem.Despite examplesystem considered analysispresentedcan easily includeother features ofa cellularsystem. CellularRadio System System-LevelDescription: Cellularsystems provide wireless coverage over geographicservice area dividingthegeographic area segmentscalled cells Figure2-1. Theavailable frequency spectrum alsodivided groupofchannels assigned eachcell. Base stations located eachcell equippedwithwireless modems cancommunicate mobileusers. Radio frequencychannels used transmissiondirection from basestation mobilearereferred forwardchannels, while channels used directionfrom basestation reversechannels. reversechannelstogether identify duplexcellular channel.When frequency divisionduplex(FDD) reversechannels frequency.Alternatively,when time division duplex
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